1. Technical Field
The present disclosure relates to a semiconductor integrated circuit device and a supply voltage supervisor included therein.
2. Description of the Background Art
In order to reduce power consumption and save power in an integrated circuit (IC), metal oxide semiconductor (MOS) transistors using silicon-on-insulator (SOI) substrates have been developed, as proposed for example in JP-2002-134752-A and JP-2001-119031-A. In the SOI substrate, forming bottoms of a source terminal and a drain terminal to reach a buried-oxide (BOX) film, junction capacitance of the MOS transistor can be lessened.
FIG. 7 is a schematic cross-sectional diagram illustrating a MOS transistor formed on an SOI substrate 200. As illustrated in FIG. 7, the MOS transistor formed on the SOI substrate 200 includes five terminals: A source terminal 101 as a voltage supply portion, a drain terminal 103, a gate terminal 105, a body terminal 107, and a silicon substrate terminal 109. Reference numeral 111 represents a buried-oxide (BOX) film. The silicon substrate (terminal) 109 is positioned beneath the BOX film 111 and functions as a support substrate to support the BOX film 111. Reference numeral 113 represents an element-separation oxide film. Reference numeral 115 represents a gate oxide film. The source terminal 101, the drain terminal 103, the body terminal 107, and the element-separation oxide film 113 are formed on a silicon active layer of the SOI substrate 200. The bottoms of the source terminal 101 and the drain terminal 103 reach the BOX film 111.
FIG. 8 shows circuitry illustrating a supply voltage supervisor 100 that is one example of a semiconductor integrated circuit that includes multiple MOS transistors formed on the SOI substrates. An input terminal Vsense, a power-supply terminal VDD, a terminal (detection terminal) Vdet, and a ground terminal GND are provided in the supply voltage supervisor 100. The terminal Vsense functions as an input terminal of the supply voltage supervisor 100. The supply voltage supervisor 100 includes negative-channel (Nch) MOS transistors M1, M2, M6, M8, and M9, positive-channel (Pch) MOS transistors M3, M4, M5, and M7, and resistors R1, R2, and R3. The supply voltage supervisor 100 detects an abnormal power supply voltage that has input to the input terminal Vsense. In the supply voltage supervisor 100, the Nch MOS transistor M2 is depletion mode-type transistor and other MOS transistor M1, M3, M4, M5, M6, M7, M8, and M9 are enhancement mode-type transistors. The Pch MOS transistors M3 and M4 constitute a current mirror circuit for a saturation current of the Nch depletion mode MOS transistor M2, which functions as a constant current load.
The inventor of the present disclosure measured electric characteristics in MOS transistors formed on SOI substrates. Relating to two types of Nch MOS transistors, a gate voltage and a drain voltage were set to 5 V (volt), a source voltage and a body voltage were set to a ground voltage (0 V), and a silicon substrate voltage (Vsub) was changed from 0V (ground voltage) to −50 V in tens of volts. Relating to a Pch MOS transistor, a gate voltage and a drain voltage were set to −5 V, a source voltage and a body voltage were set to a ground voltage (0 V), and a silicon substrate voltage (Vsub) was changed from 0V to −50 V in tens of volts.
FIG. 9 is a graph showing electric characteristics of the Nch enhancement mode MOS transistor. FIG. 10 is a graph showing electric characteristics of the Nch depletion mode MOS transistor. FIG. 11 is a graph showing electric characteristics of the Pch enhancement mode MOS transistor. In FIGS. 9 through 11, vertical axes of the graph are drain currents Id (The units of measurement are ampere (A)), and horizontal axes are silicon substrate voltages Vsub (The units of measurement are volt (V)). The respective MOS transistors were measured at temperatures of 30° C., 50° C., 75° C., 100° C., and 125° C.
It has been experimentally proven that, when the silicon substrate voltage Vsub applied to the silicon substrate 109 was changed, operating currents of the MOS transistors formed on the SOI substrates were changed, even though the MOS transistor were operated while losing a substrate bias effect (body effect) by setting the source voltage of the source terminal equal to the body voltage of the body terminal. As the silicon substrate voltage Vsub applied to the silicon substrate 109 is decreased, the saturation currents of the Nch MOS transistors were decreased. By contrast, as the silicon substrate voltage Vsub applied to the silicon substrate is decreased, the saturation current of the Pch MOS transistor was increased.
That is, when the MOS transistor formed on the SOI substrate is used in a source follower circuit in a state in which the silicon substrate of the SOI substrate is connected to the ground voltage (GND), as the power supply voltage is increased, the saturation current of the Nch MOS transistor is decreased, or the saturation current of the Pch MOS transistor is increased. In addition, it has been proven that the change of the electrical characteristics of the Pch MOS transistor is greater than that of the Nch MOS transistor.
Such electrical characteristics of the MOS transistors formed on the SOI substrate may cause a failure in the semiconductor integrated circuit. For example, in the supply voltage supervisor 100 shown in FIG. 8, when the power supply voltage supplied to the power-supply terminal VDD is set greater, the source voltages of the Pch MOS transistors M3 and M4 become separated from the silicon substrate voltage Vsub. Then, with reference to FIG. 11, the saturation current of the Pch MOS transistors M3 and M4 are increased, and finally, the Pch MOS transistors M3 and M4 cannot act as the current mirror circuit for the saturation current of the Nch depletion mode MOS transistor M2. In another case, threshold voltages of inverters inv1 and inv2 that are output destinations of a differential amplifier OPA1 are changed due to the change of the electrical characteristics of the MOS transistors, and the supply voltage supervisor 100 may mistakenly detect the power supply voltage.
In order to alleviate the change of the electrical characteristics of the MOS transistor formed on the SOI substrate, it is conceivable that the bottoms of the source terminal and the drain terminal can be prevented from reaching the BOX film by thickening the BOX film of the SOI substrate or by thickening the silicon layer of the SOI substrate.
However, if the BOX film is thickened, defects in manufacture may occur due to warpage of the silicon substrate. In addition, if the silicon layer is thickened, because the junction capacitance of the MOS transistor may be generated in the bottoms of the source terminal and the drain terminal, and the junction capacitance may be increased, which hinders efforts to reduce power consumption.